Computer systems having utilized a Peripheral Component Interconnect (PCI) communication bus having a central processing device (CPU) performing the dual functions of (i) performing mathematical calculations for various non-communication software programs, and (ii) performing host functionality for arbitrating or authorizing communication on one or more PCI busses between various devices coupled to the PCI busses. A drawback with this architecture, however, is that when the CPU is not operable the CPU is unable to perform the host tasks and therefore no communication can occur between devices coupled to the PCI busses.
Thus, there is a need for a system that will allow communication on PCI busses even if one or more of the CPUs coupled to the PCI busses are no longer operable.